In order to cope with diversification of applications of wireless communication, it is desired that synthesizers can generate an arbitrary frequency from a single local oscillator over a wide band. One method for generating an arbitrary frequency from a single local oscillator over a wide band is a fractional PLL (see, for example, Non Patent Literature 1 below).
It is known that in the fractional PLL, a fractional spurious component occurs in the vicinity of an oscillation frequency when resolution in frequency setting is made finer. Since fractional spurious components cannot be eliminated by a loop filter of the PLL, the resolution in the frequency setting is restricted. Therefore, various methods for reducing fractional spurious components have been proposed (for example, see Patent Literature 1 below).
In the synthesizer described in Patent Literature 1, a first loop for generating a high frequency signal and a second loop for generating a reference signal are included, and these first and second loops form a double feedback loop. The second loop adjusts the reference frequency of the first loop to a target frequency and the first loop uses the reference frequency finely adjusted by the second loop to generate the high frequency signal. That is, in Patent Literature 1, by controlling the reference signal of the first loop necessary for stabilizing the high frequency signal by the second loop, a spurious component occurring in the vicinity of a desired wave is suppressed.